Boundaries of Acceptable Defectiveness: Redefining Surface Code Robustness under Heterogeneous Noise

A variety of past research on superconducting qubits shows that these devices exhibit considerable variation and thus cannot be accurately depicted by a uniform noise model. To combat this often unrealistic picture of homogeneous noise in quantum processors during runtime, our work aims to define the boundaries of acceptable defectiveness (BADs), or the upper boundary of a qubit's physical error, past which this defective qubit entirely degrades the logical computation and should be considered faulty and removed from the surface code mapping. Here, we present a simulation framework based on the stabilizer simulation package STIM, that allows for rapid experimentation of quantum error correction (QEC) performance under any arbitrary and unique noise model. Using this tool, QEC circuits using rotated surface codes were generated, sampled, and analyzed from distances 3 to 17, with various defective error rates and outlier defect locations. The results suggest that there are, in fact, boundaries of acceptable defectiveness in which a defective qubit, with a physical error rate leq 0.75, can be left in the lattice with negligible impact on logical error rate given sufficient code distances and proper placement in the lattice. Additionally, when modeling noise as a uniform distribution, the logical error rate shows minimal impact with increasing deviation, with σleq μ. As a result, we propose that defectiveness of both individual qubits and the overall uniformity of lattice fidelity should not be viewed as all or nothing, but instead as a spectrum. Our research demonstrates how heterogeneity relates to the logical error rate and, through the framework provided, facilitates the development of preliminary goals and metrics for hardware designers to meet to achieve target logical performance with imperfect or nonuniform qubit qualities.