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Performance Improvement by Double-Layer a-IGZO TFTs With a Top Barrier
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Authors: Jih-Chao Chiu, Song-Ling Li, Ming-Xuan Lee, Chia-Chun Yen, Tsang-Long Chen, Cheng-Hsu Chou, C. W. Liu
Year
2022
Paper ID
4645
Status
Peer-reviewed
Abstract Read
~2 min
Abstract Words
220
Citations
N/A
Abstract
The double-layer a-IGZO thin film transistors (DL-TFTs) using a quantum well channel and a top barrier can reduce the subthreshold swing and hysteresis by 0.73<inline-formula> <tex-math notation="LaTeX">times </tex-math></inline-formula> and 0.13<inline-formula> <tex-math notation="LaTeX">times </tex-math></inline-formula>, respectively, in the transfer characteristics using the bottom gate sweep as compared to the single-layer TFTs (SL-TFTs). The wide bandgap barrier on top of the narrow bandgap IGZO channel serves as a protection layer between the IGZO channel and the SiO<sub>2</sub> top gate insulator to prevent plasma-induced damage on the IGZO channel caused by the S/D metal etching and the top gate insulator deposition. As for the mobility using the bottom gate operation with the top gate grounded, the DL-TFTs show higher mobility 1.06<inline-formula> <tex-math notation="LaTeX">$times$ </tex-math></inline-formula> at the room temperature due to less Coulomb scattering caused by the plasma-induced damage for percolation conduction, while the SL-TFTs have higher mobility at low temperatures due to the improved hopping efficiency for thermally activated hopping. The hysteresis is temperature independent down to 160 K, indicating the electrons tunneling between the channel and the top gate insulator is dominant. As for the reliability, DL-TFT has a smaller V<sub>th</sub> shift than SL-TFT under both positive bias temperature stress (PBTS) due to less subgap defect in the channel.
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- The double-layer a-IGZO thin film transistors (DL-TFTs) using a quantum well channel and a top barrier can reduce the subthreshold swing and hysteresis by 0.73 times and 0.13...
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