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Paper 1

Analytical Theory of Greedy Peeling for Bivariate Bicycle Codes and Two-Shot Streaming Decoding

Anton Pakhunov

Year

2026

Journal

arXiv preprint

DOI

arXiv:2604.11352

arXiv

2604.11352

We present an analytical theory of greedy peeling decoding for bivariate bicycle (BB) codes under circuit-level noise. The deferred greedy decoder achieves 330x latency reduction over belief propagation (BP) at p = 10^{-3} while maintaining identical logical error rate. Our main theoretical contribution is a closed-form collision resolution factor A_0 = |true collisions| / |birthday collisions|, derived from XOR syndrome analysis with no free parameters, that quantifies the fraction of detector-sharing fault pairs genuinely blocking iterative peeling. For the [[144,12,12]] Gross code, A_0 = 0.8685 (within 0.5% of the empirical value), with shared-2 pairs (4-cycles) always resolving under peeling. We show A_0 depends on the mean fault-graph degree d-bar rather than code size: A_0 = 0.87 for d-bar = 52 (Gross family) versus A_0 = 0.76 for d-bar = 17 ([[32,8,6]]). We establish a syndrome code stopping distance d_S = n/4.5 for the Gross family and demonstrate that [[32,8,6]] (d_S = 4) enables two-shot streaming decoding: T = 2 rounds achieve 89% peeling success with 1.29 +/- 0.03 LER ratio versus T = 12, at estimated latency ~50 ns. The full formula P_peel = exp(-A_0 * gamma_analytic * exp(-BTp) * n * p^2) is validated across five BB codes, four noise levels, and four values of T with R^2 = 0.86. Cross-platform reproduction of the Kunlun [[18,4,4]] experiment matches their hardware LER within 0.73 percentage points.

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Paper 2

Tradeoffs on the volume of fault-tolerant circuits

Anirudh Krishna, Gilles Zémor

Year

2025

Journal

arXiv preprint

DOI

arXiv:2510.03057

arXiv

2510.03057

Dating back to the seminal work of von Neumann [von Neumann, Automata Studies, 1956], it is known that error correcting codes can overcome faulty circuit components to enable robust computation. Choosing an appropriate code is non-trivial as it must balance several requirements. Increasing the rate of the code reduces the relative number of redundant bits used in the fault-tolerant circuit, while increasing the distance of the code ensures robustness against faults. If the rate and distance were the only concerns, we could use asymptotically optimal codes as is done in communication settings. However, choosing a code for computation is challenging due to an additional requirement: The code needs to facilitate accessibility of encoded information to enable computation on encoded data. This seems to conflict with having large rate and distance. We prove that this is indeed the case, namely that a code family cannot simultaneously have constant rate, growing distance and short-depth gadgets to perform encoded CNOT gates. As a consequence, achieving good rate and distance may necessarily entail accepting very deep circuits, an undesirable trade-off in certain architectures and applications.

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