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Paper 1

No More Hooks in the Surface Code: Distance-Preserving Syndrome Extraction for Arbitrary Layouts at Minimum Depth

Yuga Hirai, Shota Ikari, Yosuke Ueno, Yasunari Suzuki

Year

2026

Journal

arXiv preprint

DOI

arXiv:2603.01628

arXiv

2603.01628

Hook errors are a major challenge in implementing logical operations with the surface code, because they can reduce the fault distance below the code distance. This motivates syndrome-extraction circuits that suppress hook-error effects for the stabilizer layouts that appear during logical operations. However, the existing methods either increase circuit depth or require simultaneous execution of measurements and CNOT gates, both of which introduce additional overheads and degrade the threshold. We propose the ZX interleaving syndrome extraction, which preserves the full fault distance $d$ for any surface-code layout with regular stabilizer tiles at minimum depth, i.e., four layers of CNOT gates, without requiring additional circuit depth or simultaneous execution of measurements and CNOT gates. The key idea is to interleave the Z and X stabilizer tiles so that hook-error edges in the decoding graph are shortened and effectively eliminated. Numerical simulations under uniform depolarizing noise for memory and lattice-surgery experiments confirm that the proposed method achieves a full fault distance of $d$, whereas the best existing minimum-depth approach achieves $d-1$. Since the full fault distance is achievable for any regular tiling layout of the surface code, the proposed method may serve as an indispensable technique for practical fault-tolerant quantum computation.

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Paper 2

Bounds on Atomistic Disorder for Scalable Electron Shuttling

Raphaël J. Prentki, Pericles Philippopoulos, Mohammad Reza Mostaan, Félix Beaudoin

Year

2025

Journal

arXiv preprint

DOI

arXiv:2510.03113

arXiv

2510.03113

Electron shuttling is emerging as a key enabler of scalable silicon spin-qubit quantum computing, but fidelities are limited by atomistic disorder. We introduce a multiscale simulation framework combining time-dependent finite-element electrostatics and atomistic tight-binding to capture the impact of random alloying and interface roughness on the valley splitting and phase of shuttled electrons. We find that shuttling fidelities are strongly suppressed by interface roughness, with a sharp anomaly near the atomic-layer scale, setting quantitative guidelines to realize scalable shuttling.

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