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Trapped Ion Quantum Computing

Fault-tolerant embedding of quantum circuits on hardware architectures via swap gates

arXiv
Authors: Shao-Hen Chiew, Ezequiel Ignacio Rodriguez Chiacchio, Vishal Sharma, Jing Hao Chai, Hui Khoon Ng

Year

2024

Paper ID

66145

Status

Preprint

Abstract Read

~2 min

Abstract Words

208

Citations

N/A

Abstract

In near-term quantum computing devices, connectivity between qubits remain limited by architectural constraints. A computational circuit with given connectivity requirements necessary for multi-qubit gates have to be embedded within physical hardware with fixed connectivity. Long-distance gates have to be done by first routing the relevant qubits together. The simplest routing strategy involves the use of swap gates to swap the information carried by two unconnected qubits to connected ones. Ideal swap gates just permute the qubits; real swap gates, however, have the added possibilities of causing simultaneous errors on the qubits involved and spreading errors across the circuit. A general swap scheme thus changes the error-propagation properties of a circuit, including those necessary for fault-tolerant functioning of a circuit. Here, we present a simple strategy to design the swap scheme needed to embed an abstract circuit onto a physical hardware with constrained connectivity, in a manner that preserves the fault-tolerant properties of the abstract circuit. The embedded circuit will, of course, be noisier, compared to a native implementation of the abstract circuit, but we show in the examples of embedding surface codes on heavy-hexagonal and hexagonal lattices that the deterioration is not severe. This then offers a straightforward solution to implementing circuits with fault-tolerance properties on current hardware.

Why This Paper Matters

  • This paper contributes to the Trapped-Ion Quantum Computing research area in the Quantum Articles archive.
  • It adds a 2024 reference point for readers tracking recent quantum research.
  • In near-term quantum computing devices, connectivity between qubits remain limited by architectural constraints.

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