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Trapped Ion Quantum Computing
Dimensionality reduction for closed-loop quantum gate calibration
arXiv
Authors: Emma Berger, Vivek Maurya, Z. M. McIntyre, Ken Xuan Wei, Holger Haas, Daniel Puzzuoli
Year
2024
Paper ID
6279
Status
Preprint
Abstract Read
~2 min
Abstract Words
106
Citations
N/A
Abstract
Numerical gate design typically makes use of high-dimensional parameterizations enabling sophisticated, highly expressive control pulses. Developing efficient experimental calibration methods for such gates is a long-standing challenge in quantum control, as on-device calibration requires the optimization of noisy experimental data over high-dimensional parameter spaces. To improve the efficiency of calibrations, we present a systematic method for reducing the dimensionality of the parameter space traversed in gate calibration, starting from an arbitrary high-dimensional pulse representation. We use this approach to design and calibrate an Xπ/2 gate robust against amplitude and detuning errors, as well as an Xπ/2 gate robust against coherent errors due to a spectator qubit.
Why This Paper Matters
- This paper contributes to the Trapped-Ion Quantum Computing research area in the Quantum Articles archive.
- It adds a 2024 reference point for readers tracking recent quantum research.
- Numerical gate design typically makes use of high-dimensional parameterizations enabling sophisticated, highly expressive control pulses.
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