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Trapped Ion Quantum Computing

Divide-and-conquer verification method for noisy intermediate-scale quantum computation

arXiv
Authors: Yuki Takeuchi, Yasuhiro Takahashi, Tomoyuki Morimae, Seiichiro Tani

Year

2021

Paper ID

61115

Status

Preprint

Abstract Read

~2 min

Abstract Words

191

Citations

N/A

Abstract

Several noisy intermediate-scale quantum computations can be regarded as logarithmic-depth quantum circuits on a sparse quantum computing chip, where two-qubit gates can be directly applied on only some pairs of qubits. In this paper, we propose a method to efficiently verify such noisy intermediate-scale quantum computation. To this end, we first characterize small-scale quantum operations with respect to the diamond norm. Then by using these characterized quantum operations, we estimate the fidelity langleψt|hatρrm outtrangle between an actual n-qubit output state hatρrm out obtained from the noisy intermediate-scale quantum computation and the ideal output state (i.e., the target state) trangle. Although the direct fidelity estimation method requires O\(2n\) copies of hatρrm out on average, our method requires only O\(D3212D\) copies even in the worst case, where D is the denseness of trangle. For logarithmic-depth quantum circuits on a sparse chip, D is at most O\(log{n}\), and thus O\(D3212D\) is a polynomial in n. By using the IBM Manila 5-qubit chip, we also perform a proof-of-principle experiment to observe the practical performance of our method.

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  • This paper contributes to the Trapped-Ion Quantum Computing research area in the Quantum Articles archive.
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  • Several noisy intermediate-scale quantum computations can be regarded as logarithmic-depth quantum circuits on a sparse quantum computing chip, where two-qubit gates can be...

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