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Trapped Ion Quantum Computing
Systematic frequency-collision analysis of the cross-resonance gate outside the straddling regime
arXiv
Authors: Shinichi Inoue, Shotaro Shirai, Shuhei Tamate, Shu Watanabe, Kohei Matsuura, Rui Li, Yasunobu Nakamura
Year
2026
Paper ID
60702
Status
Preprint
Abstract Read
~2 min
Abstract Words
193
Citations
N/A
Abstract
Frequency crowding remains a major obstacle to scaling fixed-frequency transmon processors. Among the widely used all-microwave two-qubit gates, the cross-resonance (CR) gate is particularly sensitive to qubit-frequency spread because the conventional straddling regime condition constrains assignable qubit frequencies tightly and makes the system susceptible to frequency collisions. Here, we propose and analyze the CR gate outside the straddling regime, which we refer to as the far-detuned regime, and evaluate frequency collisions using a numerical method that remains accurate under high-intensity, smoothly ramped microwave drives. Based on this analysis, we perform systematic parameter sweeps and provide collision-free conditions that define designable frequency regions in which qubit frequencies can be assigned consistently with surrounding qubit frequencies. Furthermore, we formulate frequency allocation as a linear programming optimization on a unit-cell lattice with periodic boundary conditions to obtain an optimal allocation. We demonstrate that far-detuned designs significantly reduce collisions compared with designs in the straddling regime. Monte Carlo yield analysis indicates that 10% collision-free yield for a 1024-qubit square lattice at a 0.1% two-qubit-gate error threshold requires σf/2πle 6.8 MHz. Our findings suggest that this is feasible with an approximately twofold reduction in the state-of-the-art qubit-frequency spread.
Why This Paper Matters
- This paper contributes to the Trapped-Ion Quantum Computing research area in the Quantum Articles archive.
- It adds a 2026 reference point for readers tracking recent quantum research.
- Frequency crowding remains a major obstacle to scaling fixed-frequency transmon processors.
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