Design and Performance Evaluation of an Optimized Arithmetic Logic Unit through Quantum Dot Cellular Automata Nanocomputing

Fast computation with low-energy treatment has an immense effect on the advancement of modern society, including industry, healthcare, education sector and telecommunication. Complementary Metal Oxide Semiconductor (CMOS) chips in classical computers suffer many types of difficulties such as short channel effects, leakage current, switching speed, energy consumption and packaging density. These complications become significant when applied in integrated circuits. The substitute for CMOS chips is Quantum-Dot Cellular Automata (QCA) nanotechnology. The QCA-based digital designs are compact, fast and involve low energy dissipation as compared to CMOS-based digital designs. This research brings a compact-size QCA-based Arithmetic Logic Unit (ALU) having 151 cells with an area of 0.143 [Formula: see text]m 2 . This single-bit ALU circuit is extended to design an efficient 2-bit ALU and then 4-bit ALU circuits. The proposed design reveals 47% improvement in energy dissipation and 39% in cell count over the recent 1-bit ALU design. The proposed designs are structured and simulated on QCA Designer 2.0.3 and estimation of power dissipation has been conducted on QCA Designer-E software.