Abstract
Abstract This study investigates the algebraic co-design of quantum-AI abstractions, energy-adaptive semiconductor architectures, and neuromorphic computing pathways for edge intelligence. The core problem addressed is the growing mismatch between the computational intensity of modern inference workloads and the strict power, thermal, and memory limits of edge devices that must operate continuously in industrial, mobile, and cyber-physical settings. Existing edge-AI platforms provide high throughput, yet they often rely on dense data movement, externally managed memory hierarchies, and power envelopes that complicate always-on deployment. In parallel, neuromorphic platforms show promising event-driven sparsity and very low inference power, but the design space remains fragmented across device physics, architecture, workload shape, and deployment objective. The present paper develops an algebraic quantum-AI co-design framework that formalises this design space and links architecture selection to measurable energy-performance relations. Real data were collected from official NVIDIA Jetson specifications, the Hailo-8 product brief, the MLPerf Tiny benchmark suite, the Intel Loihi 2 technology brief, and published neuromorphic benchmark evidence including NeuroBench and a BrainChip comparative report. No synthetic hardware values were introduced. The analysis combines explicit equations for dynamic power, event-driven energy, energy-delay utility, and a constrained architecture-selection objective with tables and figures derived from the collected corpus. The results show a clear division of labour across edge semiconductors: high-throughput Jetson-class modules dominate dense multi-stream inference, Hailo-8 offers a strong low-power dataflow alternative, and neuromorphic designs offer the strongest always-on inference advantage when sparse event streams and adaptive signalling dominate. The study concludes that future edge intelligence systems will benefit from heterogeneous co-designed stacks in which dense accelerators, memory-local dataflow engines, and neuromorphic coprocessors are orchestrated through algebraic runtime policies rather than treated as isolated hardware categories. Keywords: quantum-AI co-design; energy-adaptive semiconductors; edge intelligence; neuromorphic computing; Loihi 2; Akida; Hailo-8; Jetson Orin; MLPerf Tiny; algebraic architecture optimisation
