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Quantum Circuit Design Gate Engineering
Quantum Error Correction Fault Tolerance
Minimization of AND-XOR Expressions with Decoders for Quantum Circuits
arXiv
Authors: Sonia Yang, Ali Al-Bayaty, Marek Perkowski
Year
2026
Paper ID
4193
Status
Preprint
Abstract Read
~2 min
Abstract Words
159
Citations
N/A
Abstract
This paper introduces a new logic structure for reversible quantum circuit synthesis. Our synthesis method aims to minimize the quantum cost of reversible quantum circuits with decoders. In this method, multi-valued input, binary output (MVI) functions are utilized as a mathematical concept only, but the circuits are binary. We introduce the new concept of "Multi-Valued Input Fixed Polarity Reed-Muller (MVI-RM)" forms. Our decoder-based circuit uses three logical levels in contrast to commonly-used methods based on Exclusive-or Sum of Products (ESOP) with two levels (AND-XOR expressions), realized by Toffoli gates. In general, the high number of input qubits in the resulting Toffoli gates is a problem that greatly impacts the quantum cost. Using decoders decreases the number of input qubits in these Toffoli gates. We present two practical algorithms for three-level circuit synthesis by finding the MVI-FPRM: products-matching and the newly developed butterfly diagrams. The best MVI-FPRM forms are factorized and reduced to approximate Multi-Valued Input Generalized Reed-Muller (MVI-GRM) forms.
Why This Paper Matters
- This paper contributes to the Quantum Error Correction & Fault Tolerance research area in the Quantum Articles archive.
- It adds a 2026 reference point for readers tracking recent quantum research.
- This paper introduces a new logic structure for reversible quantum circuit synthesis.
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