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Quantum Circuit Design Gate Engineering
Quantum Compilation Routing Architecture
Quantum Gate Fidelity Benchmarking
Investigation of Hardware Architecture Effects on Quantum Algorithm Performance: A Comparative Hardware Study
arXiv
Authors: Askar Oralkhan, Temirlan Zhaxalykov
Year
2026
Paper ID
4126
Status
Preprint
Abstract Read
~2 min
Abstract Words
153
Citations
N/A
Abstract
Cloud-accessible quantum processors enable direct execution of quantum algorithms on heterogeneous hardware platforms. Unlike classical systems, however, identical quantum circuits may exhibit substantially different behavior across devices due to architectural variations in qubit connectivity, gate fidelity, and coherence times. In this work, we systematically benchmark five representative quantum algorithms - Bell state preparation, GHZ state generation, Quantum Fourier Transform (QFT), Grover's Search, and the Quantum Approximate Optimization Algorithm (QAOA) - across trapped-ion, superconducting, and simulator backends using Amazon Braket. Performance metrics including fidelity, CHSH violation, success probability, circuit depth, and gate counts are evaluated. Our results demonstrate a strong dependence of algorithmic performance on hardware topology and noise characteristics. For example, 10-qubit GHZ states achieved fidelities above 0.8 on trapped-ion hardware, while superconducting platforms dropped below 0.15 due to routing overhead and accumulated two-qubit gate errors. These findings highlight the importance of hardware-aware algorithm selection and provide practical guidance for benchmarking in the NISQ era.
Why This Paper Matters
- This paper contributes to the Quantum Circuit Design & Gate Engineering research area in the Quantum Articles archive.
- It adds a 2026 reference point for readers tracking recent quantum research.
- Cloud-accessible quantum processors enable direct execution of quantum algorithms on heterogeneous hardware platforms.
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