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Trapped Ion Quantum Computing

Bit-Vector Abstractions to Formally Verify Quantum Error Detection & Entanglement

arXiv
Authors: Arun Govindankutty

Year

2026

Paper ID

30858

Status

Preprint

Abstract Read

~2 min

Abstract Words

84

Citations

1

Abstract

We present a scalable formal verification methodology for Quantum Phase Estimation (QPE) circuits. Our approach uses a symbolic qubit abstraction based on quantifier-free bit-vector logic, capturing key quantum phenomena, including superposition, rotation, and measurement. The proposed methodology maps quantum circuit functional behaviour from Hilbert space to a bit-vector domain. We develop formal properties aligned with this abstraction to ensure functional correctness of QPE circuits. The method scales efficiently, verifying QPE circuits with up to 6 precision qubits and 1,024 phase qubits using under 3.5 GB of memory.

Why This Paper Matters

  • This paper contributes to the Trapped-Ion Quantum Computing research area in the Quantum Articles archive.
  • It adds a 2026 reference point for readers tracking recent quantum research.
  • We present a scalable formal verification methodology for Quantum Phase Estimation (QPE) circuits.

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References & Citation Signals

[1] DOI https://doi.org/arXiv:2603.13554 [2] arXiv https://arxiv.org/abs/2603.13554 [3] Publisher https://arxiv.org/abs/2603.13554

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Current Paper #30858

External citation index: OpenAlex citation signal • updated 2026-11-04 03:36:52

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