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Superconducting Qubits
Low Loss Multi-Layer Wiring for Superconducting Microwave Devices
arXiv
Authors: A. Dunsworth, A. Megrant, R. Barends, Yu Chen, Zijun Chen, B. Chiaro, A. Fowler, B. Foxen, E. Jeffrey, J. Kelly, P. V. Klimov, E. Lucero, J. Y. Mutus, M. Neeley, C. Neill, C. Quintana, P. Roushan, D. Sank, A. Vainsencher, J. Wenner, T. C. White, H. Neven, John M. Martinis
Year
2017
Paper ID
24756
Status
Preprint
Abstract Read
~2 min
Abstract Words
181
Citations
N/A
Abstract
Complex integrated circuits require multiple wiring layers. In complementary metal-oxide-semiconductor (CMOS) processing, these layers are robustly separated by amorphous dielectrics. These dielectrics would dominate energy loss in superconducting integrated circuits. Here we demonstrate a procedure that capitalizes on the structural benefits of inter-layer dielectrics during fabrication and mitigates the added loss. We separate and support multiple wiring layers throughout fabrication using SiO2 scaffolding, then remove it post-fabrication. This technique is compatible with foundry level processing and the can be generalized to make many different forms of low-loss multi-layer wiring. We use this technique to create freestanding aluminum vacuum gap crossovers (airbridges). We characterize the added capacitive loss of these airbridges by connecting ground planes over microwave frequency λ/4 coplanar waveguide resonators and measuring resonator loss. We measure a low power resonator loss of sim 3.9 times 10-8 per bridge, which is 100 times lower than dielectric supported bridges. We further characterize these airbridges as crossovers, control line jumpers, and as part of a coupling network in gmon and fuxmon qubits. We measure qubit characteristic lifetimes $T1$'s in excess of 30 μs in gmon devices.
Why This Paper Matters
- This paper contributes to the Superconducting Qubits research area in the Quantum Articles archive.
- It adds a 2017 reference point for readers tracking recent quantum research.
- Complex integrated circuits require multiple wiring layers.
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