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Superconducting Qubits

High-fidelity controlled-Z gate with maximal intermediate leakage operating at the speed limit in a superconducting quantum processor

arXiv

Authors: V. Negîrneac, H. Ali, N. Muthusubramanian, F. Battistel, R. Sagastizabal, M. S. Moreira, J. F. Marques, W. Vlothuizen, M. Beekman, N. Haider, A. Bruno, L. DiCarlo

Year

2020

Paper ID

21413

Status

Preprint

Abstract Read

~2 min

Abstract Words

103

Citations

N/A

Abstract

We introduce the sudden variant (SNZ) of the Net Zero scheme realizing controlled-Z (CZ) gates by baseband flux control of transmon frequency. SNZ CZ gates operate at the speed limit of transverse coupling between computational and non-computational states by maximizing intermediate leakage. The key advantage of SNZ is tuneup simplicity, owing to the regular structure of conditional phase and leakage as a function of two control parameters. We realize SNZ CZ gates in a multi-transmon processor, achieving 99.93pm0.24\% fidelity and 0.10pm0.02\% leakage. SNZ is compatible with scalable schemes for quantum error correction and adaptable to generalized conditional-phase gates useful in intermediate-scale applications.

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We introduce the sudden variant (SNZ) of the Net Zero scheme realizing controlled-Z (CZ) gates by baseband flux control of transmon frequency.

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References & Citation Signals

[1] DOI https://doi.org/arXiv:2008.07411 [2] arXiv https://arxiv.org/abs/2008.07411 [3] Publisher https://arxiv.org/abs/2008.07411

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