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Paper 1
Edge local complementation for logical cluster states
Jaewoo Joo, David L. Feder
- Year
- 2011
- Journal
- arXiv preprint
- DOI
- arXiv:1105.3921
- arXiv
- 1105.3921
A method is presented for the implementation of edge local complementation in graph states, based on the application of two Hadamard operations and a single controlled-phase (CZ) gate. As an application, we demonstrate an efficient scheme to construct a one-dimensional logical cluster state based on the five-qubit quantum error-correcting code, using a sequence of edge local complementations. A single physical CZ operation, together with local operations, is sufficient to create a logical CZ operation between two logical qubits. The same construction can be used to generate any encoded graph state. This approach in concatenation may allow one to create a hierarchical quantum network for quantum information tasks.
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Tradeoffs on the volume of fault-tolerant circuits
Anirudh Krishna, Gilles Zémor
- Year
- 2025
- Journal
- arXiv preprint
- DOI
- arXiv:2510.03057
- arXiv
- 2510.03057
Dating back to the seminal work of von Neumann [von Neumann, Automata Studies, 1956], it is known that error correcting codes can overcome faulty circuit components to enable robust computation. Choosing an appropriate code is non-trivial as it must balance several requirements. Increasing the rate of the code reduces the relative number of redundant bits used in the fault-tolerant circuit, while increasing the distance of the code ensures robustness against faults. If the rate and distance were the only concerns, we could use asymptotically optimal codes as is done in communication settings. However, choosing a code for computation is challenging due to an additional requirement: The code needs to facilitate accessibility of encoded information to enable computation on encoded data. This seems to conflict with having large rate and distance. We prove that this is indeed the case, namely that a code family cannot simultaneously have constant rate, growing distance and short-depth gadgets to perform encoded CNOT gates. As a consequence, achieving good rate and distance may necessarily entail accepting very deep circuits, an undesirable trade-off in certain architectures and applications.
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