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Paper 1

Co-Designed Superconducting Architecture for Lattice Surgery of Surface Codes with Quantum Interface Routing Card

Charles Guinn, Samuel Stein, Esin Tureci, Guus Avis, Chenxu Liu, Stefan Krastanov, Andrew A. Houck, Ang Li

Year

2023

Journal

arXiv preprint

DOI

arXiv:2312.01246

arXiv

2312.01246

Facilitating the ability to achieve logical qubit error rates below physical qubit error rates, error correction is anticipated to play an important role in scaling quantum computers. While many algorithms require millions of physical qubits to be executed with error correction, current superconducting qubit systems contain only hundreds of physical qubits. One of the most promising codes on the superconducting qubit platform is the surface code, requiring a realistically attainable error threshold and the ability to perform universal fault-tolerant quantum computing with local operations via lattice surgery and magic state injection. Surface code architectures easily generalize to single-chip planar layouts, however space and control hardware constraints point to limits on the number of qubits that can fit on one chip. Additionally, the planar routing on single-chip architectures leads to serialization of commuting gates and strain on classical decoding caused by large ancilla patches. A distributed multi-chip architecture utilizing the surface code can potentially solve these problems if one can optimize inter-chip gates, manage collisions in networking between chips, and minimize routing hardware costs. We propose QuIRC, a superconducting Quantum Interface Routing Card for Lattice Surgery between surface code modules inside of a single dilution refrigerator. QuIRC improves scaling by allowing connection of many modules, increases ancilla connectivity of surface code lattices, and offers improved transpilation of Pauli-based surface code circuits. QuIRC employs in-situ Entangled Pair (EP) generation protocols for communication. We explore potential topological layouts of QuIRC based on superconducting hardware fabrication constraints, and demonstrate reductions in ancilla patch size by up to 77.8%, and in layer transpilation size by 51.9% when compared to the single-chip case.

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Paper 2

Next Generation Ta-STJ Sensor Arrays for BSM Physics Searches

Joseph P. T. Templet, Spencer Fretwell, Andrew Marino, Robin Cantor, Ad Hall, Connor Bray, Caitlyn Stone-Whitehead, Inwook Kim, Francisco Ponce, Wouter Van De Pontseele, Kyle G. Leach, Stephan Friedrich

Year

2025

Journal

arXiv preprint

DOI

arXiv:2510.03556

arXiv

2510.03556

The Beryllium Electron capture in Superconducting Tunnel junctions (BeEST) experiment uses superconducting tunnel junction (STJ) sensors to search for physics beyond the standard model (BSM) with recoil spectroscopy of the $\mathbf{^7}$Be EC decay into $\mathbf{^7}$Li. A pulsed UV laser is used to calibrate the STJs throughout the experiment with $\sim$20 meV precision. Phase-III of the BeEST experiment revealed a systematic calibration discrepancy between STJs. We found these artifacts to be caused by resistive crosstalk and by intensity variations of the calibration laser. For phase-IV of the BeEST experiment, we have removed the crosstalk by designing the STJ array so that each pixel has its own ground wire. We now also use a more stable UV laser for calibration. The new STJ arrays were fabricated at STAR Cryoelectronics and tested at LLNL and FRIB. They have the same high energy resolution of $\sim$1-2~eV in the energy range of interest below 100~eV as before, and they no longer exhibit the earlier calibration artifacts. We discuss the design changes and the STJ array performance for the next phase of the BeEST experiment.

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