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Paper 1

Co-Designed Superconducting Architecture for Lattice Surgery of Surface Codes with Quantum Interface Routing Card

Charles Guinn, Samuel Stein, Esin Tureci, Guus Avis, Chenxu Liu, Stefan Krastanov, Andrew A. Houck, Ang Li

Year

2023

Journal

arXiv preprint

DOI

arXiv:2312.01246

arXiv

2312.01246

Facilitating the ability to achieve logical qubit error rates below physical qubit error rates, error correction is anticipated to play an important role in scaling quantum computers. While many algorithms require millions of physical qubits to be executed with error correction, current superconducting qubit systems contain only hundreds of physical qubits. One of the most promising codes on the superconducting qubit platform is the surface code, requiring a realistically attainable error threshold and the ability to perform universal fault-tolerant quantum computing with local operations via lattice surgery and magic state injection. Surface code architectures easily generalize to single-chip planar layouts, however space and control hardware constraints point to limits on the number of qubits that can fit on one chip. Additionally, the planar routing on single-chip architectures leads to serialization of commuting gates and strain on classical decoding caused by large ancilla patches. A distributed multi-chip architecture utilizing the surface code can potentially solve these problems if one can optimize inter-chip gates, manage collisions in networking between chips, and minimize routing hardware costs. We propose QuIRC, a superconducting Quantum Interface Routing Card for Lattice Surgery between surface code modules inside of a single dilution refrigerator. QuIRC improves scaling by allowing connection of many modules, increases ancilla connectivity of surface code lattices, and offers improved transpilation of Pauli-based surface code circuits. QuIRC employs in-situ Entangled Pair (EP) generation protocols for communication. We explore potential topological layouts of QuIRC based on superconducting hardware fabrication constraints, and demonstrate reductions in ancilla patch size by up to 77.8%, and in layer transpilation size by 51.9% when compared to the single-chip case.

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Paper 2

Reconfigurable quantum photonics with on-chip detectors

Samuel Gyger, Julien Zichi, Lucas Schweickert, Ali W. Elshaari, Stephan Steinhauer, Saimon F. Covre da Silva, Armando Rastelli, Val Zwiller, Klaus D. Jöns, Carlos Errando-Herranz

Year

2020

Journal

arXiv preprint

DOI

arXiv:2007.06429

arXiv

2007.06429

Integrated quantum photonics offers a promising path to scale up quantum optics experiments by miniaturizing and stabilizing complex laboratory setups. Central elements of quantum integrated photonics are quantum emitters, memories, detectors, and reconfigurable photonic circuits. In particular, integrated detectors not only offer optical readout but, when interfaced with reconfigurable circuits, allow feedback and adaptive control, crucial for deterministic quantum teleportation, training of neural networks, and stabilization of complex circuits. However, the heat generated by thermally reconfigurable photonics is incompatible with heat-sensitive superconducting single-photon detectors, and thus their on-chip co-integration remains elusive. Here we show low-power microelectromechanical reconfiguration of integrated photonic circuits interfaced with superconducting single-photon detectors on the same chip. We demonstrate three key functionalities for photonic quantum technologies: 28 dB high-extinction routing of classical and quantum light, 90 dB high-dynamic range single-photon detection, and stabilization of optical excitation over 12 dB power variation. Our platform enables heat-load free reconfigurable linear optics and adaptive control, critical for quantum state preparation and quantum logic in large-scale quantum photonics applications.

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