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Paper 1

In-Situ Simultaneous Magic State Injection on Arbitrary CSS qLDPC Codes

Kun Liu, Shifan Xu, Tomas Jochym-O'Connor, Zhiyang He, Shraddha Singh, Yongshan Ding

Year

2026

Journal

arXiv preprint

DOI

arXiv:2604.05126

arXiv

2604.05126

Quantum low-density parity-check (qLDPC) codes can encode many logical qubits within a single code block at low physical qubit overhead, yet magic state injection into such codes remains largely underexplored. Existing state injection proposals for qLDPC codes predominantly follow an external prepare-and-transfer paradigm, in which raw magic states are prepared outside the target code block and subsequently injected via inter-code operations. We propose the first \emph{in-situ} magic state injection: a scheme in which logical magic states are directly prepared within a qLDPC memory block, only using resources required for syndrome extraction. We show that our scheme is generalizable to any CSS qLDPC code, with examples of circuit-level simulations on the $[[144,12,12]]$ Bivariate Bicycle (BB) code and the $[[225,9,4]]$ Hypergraph Product code. We focus on a regime where correlated injection errors are negligible. In the BB code, this corresponds to a configuration that simultaneously injects four logical $|Y\rangle$ states. Under a uniform depolarizing noise model with physical error rate $10^{-3}$, this achieves an injection error rate of $1.62 \times 10^{-3}$ per logical qubit, while the correlated-error contribution is only $2 \times 10^{-5}$ per logical qubit (about $1\%$ of the injection error rate). Under a hardware-motivated asymmetric noise model where single-qubit gate errors are $10\%$ of two-qubit gate errors, the injection error rate per logical qubit falls to $ 6.7 \times 10^{-4} $, below the error rate ($ 10^{-3} $) of the two-qubit gates used to encode the magic states. Its simplicity allows our scheme to be applied to arbitrary CSS qLDPC codes using only the ancilla qubits native to syndrome extraction, and yield a reduction in space overhead relative to both prepare-and-transfer approaches and surface-code-based magic state injection schemes.

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Paper 2

Tradeoffs on the volume of fault-tolerant circuits

Anirudh Krishna, Gilles Zémor

Year

2025

Journal

arXiv preprint

DOI

arXiv:2510.03057

arXiv

2510.03057

Dating back to the seminal work of von Neumann [von Neumann, Automata Studies, 1956], it is known that error correcting codes can overcome faulty circuit components to enable robust computation. Choosing an appropriate code is non-trivial as it must balance several requirements. Increasing the rate of the code reduces the relative number of redundant bits used in the fault-tolerant circuit, while increasing the distance of the code ensures robustness against faults. If the rate and distance were the only concerns, we could use asymptotically optimal codes as is done in communication settings. However, choosing a code for computation is challenging due to an additional requirement: The code needs to facilitate accessibility of encoded information to enable computation on encoded data. This seems to conflict with having large rate and distance. We prove that this is indeed the case, namely that a code family cannot simultaneously have constant rate, growing distance and short-depth gadgets to perform encoded CNOT gates. As a consequence, achieving good rate and distance may necessarily entail accepting very deep circuits, an undesirable trade-off in certain architectures and applications.

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