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Paper 1

Non-Clifford and Parallelizable Fault-Tolerant Logical Gates on Constant and Almost-Constant Rate Homological Quantum Low-Density Parity-Check Codes via Higher Symmetries

Guanyu Zhu, Shehryar Sikander, Elia Portnoy, Andrew W. Cross, Benjamin J. Brown

Year
2025
Journal
PRX Quantum
DOI
10.1103/wcxs-w69t
arXiv
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We study parallel fault-tolerant quantum computing for families of homological quantum low-density parity-check (LDPC) codes defined on 3-manifolds with constant or almost-constant encoding rate. We derive a generic formula for a transversal T gate on color codes defined on general 3-manifolds, which acts as collective non-Clifford logical ccz gates on any triplet of logical qubits with their logical-X membranes having a Z_{2} triple intersection at a single point. The triple-intersection number is a topological invariant, which also arises in the path integral of the emergent higher symmetry operator in a topological quantum field theory (TQFT): the Z_{2}^{3} gauge theory. Moreover, the transversal S gate of the color code corresponds to a higher-form symmetry in TQFT supported on a codimension-1 submanifold, giving rise to exponentially many addressable and parallelizable logical cz gates. A construction of constant-depth circuits of the above logical gates via cup-product cohomology operation is also presented for three copies of identical toric codes on arbitrary 3-manifolds. We have developed a generic formalism to compute the triple-intersection invariants for 3-manifolds, with the structure encoded into an interaction hypergraph which determines the logical gate property and also corresponds to the hypergraph magic state that can be injected into the code without distillation (“magic-state fountain”). We also study the scaling of the Betti number and systoles with volume for various 3-manifolds, which translates to the encoding rate and distance. We further develop three types of LDPC codes supporting such logical gates: (1) A quasi-hyperbolic code from the product of 2D hyperbolic surface and a circle, with almost-constant rate k/n=O(1/log⁡(n)) and O(log⁡(n)) distance; (2) A homological fiber-bundle code from twisting the product by an isometry of the surface based on the construction by Freedman-Meyer-Luo, with O(1/log^{1/2}⁡(n)) rate and O(log^{1/2}⁡(n)) distance; (3) A specific family of 3D hyperbolic codes: the Torelli mapping-torus code, constructed from mapping tori of a pseudo-Anosov element in the Torelli subgroup, which has constant rate while the distance scaling is currently unknown. We then show a generic constant-overhead scheme for applying a parallelizable universal gate set with the aid of logical-X measurements.

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Paper 2

Measurement-Free Ancilla Recycling via Blind Reset: A Cross-Platform Study on Superconducting and Trapped-Ion Processors

Sangkeum Lee

Year
2026
Journal
arXiv preprint
DOI
arXiv:2603.08733
arXiv
2603.08733

Ancilla reuse in repeated syndrome extraction couples reset quality to logical-cycle latency. We evaluate blind reset -- unitary-only recycling via scaled sequence replay -- on IQM Garnet, Rigetti Ankaa-3, and IonQ under matched seeds, sequence lengths, and shot budgets. Using ancilla cleanliness F_clean=P(|0>), per-cycle latency, and a distance-3 repetition-code logical-error proxy, platform-calibrated simulation identifies candidate regions where blind reset cuts cycle latency by up to 38x under NVQLink-class feedback overhead while maintaining F_clean >= 0.86 for L <= 6. Hardware experiments on IQM Garnet confirm blind-reset cleanliness >= 0.84 at L=8 (1024 shots, seed 42); platform-calibrated simulation for Rigetti Ankaa-3 predicts comparable performance. Architecture-dependent crossover lengths are L* ~ 12 (IQM), ~ 11 (Rigetti), ~ 1 (IonQ), and ~ 78 with GPU-linked external feedback. Two added analyses tighten deployment boundaries: a T1/T2 sensitivity map identifies coherence-ratio regimes, and error-bound validation confirms measured cleanliness remains consistent with the predicted diagnostic envelope. A deployment decision matrix translates these results into backend-specific policy selection.

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