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Paper 1

Halma: a routing-based technique for defect mitigation in quantum error correction

Runshi Zhou, Fang Zhang, Linghang Kong, Jianxin Chen

Year

2024

Journal

arXiv preprint

DOI

arXiv:2412.21000

arXiv

2412.21000

As quantum chips scale up for large-scale computation, hardware defects become inevitable and must be carefully addressed. In this work, we introduce Halma, a defect mitigation technique empowered by an expanded native gate set that incorporates the iSWAP gate alongside the conventional CNOT gate, both commonly available on many superconducting processors. Halma effectively mitigates ancilla qubit defects during surface code stabilizer measurements, enhancing the robustness and reliability of quantum computation. Halma introduces zero reduction in the spacelike distance of the code, leading to effective preservation of encoded logical information. Meanwhile, it does not further sacrifice the timelike distance, which enables efficient logical operations on surface code patches. Under a realistic physical noise level of $10^{-3}$, Halma achieves a logical error rate that is only $\sim1.5\times$ that of the defect-free code when handling a single ancilla qubit defect on a small-distance surface code. In comparison to previous defect-handling methods, Halma provides a $\sim10\times$ improvement in the average logical error rate of distance-11 surface codes with a defect rate of 2%, and a $\sim3\times$ reduction in the teraquop footprint, that is, the number of physical qubits required to reach a logical error rate of $10^{-12}$. Generally speaking, Halma can be viewed as an additional equipment in the toolbox of defect mitigation, or an upgrade patch, as it is directly compatible with most of the existing superstabilizer-based approaches in handling data qubit defects and defect clusters. Halma not only significantly eases the near-term realization of fault-tolerant quantum computing on hardware with fabrication defects, but also exemplifies how leveraging intrinsic hardware capabilities can enhance quantum hardware performance, particularly in the context of quantum error correction.

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Paper 2

Qubit-oscillator concatenated codes: decoding formalism & code comparison

Yijia Xu, Yixu Wang, En-Jui Kuo, Victor V. Albert

Year

2022

Journal

arXiv preprint

DOI

arXiv:2209.04573

arXiv

2209.04573

Concatenating bosonic error-correcting codes with qubit codes can substantially boost the error-correcting power of the original qubit codes. It is not clear how to concatenate optimally, given there are several bosonic codes and concatenation schemes to choose from, including the recently discovered GKP-stabilizer codes [Phys. Rev. Lett. 125, 080503 (2020)}] that allow protection of a logical bosonic mode from fluctuations of the mode's conjugate variables. We develop efficient maximum-likelihood decoders for and analyze the performance of three different concatenations of codes taken from the following set: qubit stabilizer codes, analog/Gaussian stabilizer codes, GKP codes, and GKP-stabilizer codes. We benchmark decoder performance against additive Gaussian white noise, corroborating our numerics with analytical calculations. We observe that the concatenation involving GKP-stabilizer codes outperforms the more conventional concatenation of a qubit stabilizer code with a GKP code in some cases. We also propose a GKP-stabilizer code that suppresses fluctuations in both conjugate variables without extra quadrature squeezing, and formulate qudit versions of GKP-stabilizer codes.

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